Apparatus and method for displacing movable system with respect to a data carrier

ABSTRACT

A head is shifted relative to a magnetic disc for recorded information carried by plural concentric recording tracks on the disc. Addresses of the tracks are recorded on and read by a head from plural reference zones on the disc. The head is shifted from a starting track A to a destination track B by an electric motor. The motor is controlled so the head is accelerated from track A to track C and the head is decelerated when it reaches track C; track C being between tracks A and B. The motor is controlled by calculating an acceleration instruction for the head in response to addresses read by the head and by measuring the head acceleration. The instruction and measured accelerations are combined to derive an error indication that controls the motor.

TECHNICAL FIELD

The present invention relates to apparatus for and a method ofdisplacing a movable system with respect to a data carrier and, moreparticularly, to displacing a head for a data carrier in response toacceleration instructions derived from addresses read by the head fromthe carrier and a measured head acceleration value.

BACKGROUND ART

In data processing systems, magnetic disc memories are very frequentlyused because they have high storage capacity and require a relativelyshort time for magnetic read/write heads to access a data item containedat any point on a disc from the moment an order is derived to access thedata item. Magnetic discs used in such memories carry coded data inconcentric circular recording tracks having a width no greater than afew hundredths of a millimeter. The recording tracks are situated onboth faces of the discs. Data recorded in the tracks are usually codedin binary form.

Each individual track on a disc is assigned a serial number j, where jis an integer between zero and (N-1), where N is the total number ofrecorded tracks on a face of a disc. A binary coded expression of aserial number j for a particular track is referred to as the trackaddress. Each track includes magnetic variations, representing binaryvalues for the track addresses and for data recorded between the spaceprovided for the addresses.

Data are read from or written into the tracks by magnetic heads that arepositioned on each side of the discs, at a distance of a few tenths of amicron from the disc. To position the heads at a particular trackaddress, the heads are driven radially relative to the disc, while thediscs are driven at constant rotational speed by an electric motor.

In currently available magnetic disc memory systems, and, moreparticularly, in the case of disc memories including a limited number ofdiscs, generally fewer than four or five, the data are arranged on thedisc faces as follows. A large amount of space is reserved for data orinformation to be processed by the data processing system of which thememory is a part; for simplication, these data are referred to as "datato be processed". A relatively small amount of space is reserved fortrack addresses and for data used to control the position of themagnetic head or heads relative to the tracks. Hereafter, the trackaddresses and data for servo-controlling the position of the head arereferred to as "track identifying data".

In the following discussion, for simplification, only one face of a discis considered in combination with only one magnetic head. The magnetichead reads and/or writes both the data to be processed and the trackidentifying data. It is to be understood, however, that the principlesof the invention are applicable to a system including multiple discs,each having two faces.

It is the present practice, as described, for example, in U.S. Pat. No.4,151,571, for the data contained on each face of a disc to bedistributed over equal and adjacent circular sectors S₀, S₁ . . . S_(i). . . S_(n-1). Generally, a disc face is divided into several tens ofsectors, most often forty to fifty. As the face of a magnetic discpasses in front of or beneath a magnetic head associated with it, sectorS₀ is read by the head before sector S₁, the sector S₁ before the sectorS₂, etcetera. Thus, the nomenclature is that sector S₀ precedes sectorS₁, which in turn precedes sector S₂, etcetera. Thus, if two data itemsI_(k-1) and I_(k) follow one another on the same track, having serialnumber j on the same face, data item I_(k-1) precedes data item I_(k)because data item I_(k-1) is read by the head before data item I_(k) ;conversely, data item I_(k) is said to follow data item I_(k-1). Thesame reasoning is applicable for several data groups G_(k) and G_(k-1).

Each sector S_(i) is divided into a relatively large area and arelatively small area. The large area of each sector S_(i) includes thedata to be processed, while the smaller area includes the trackidentification data. The smaller area of each sector is divided intoseveral zones, referred to as "reference zones"; the number of referencezones on each disc is equal to the number of tracks on the disc, suchthat each track is associated with one and the same zone.

Binary ones and zeros are designated as "bits". Binary bits can berepresented as magnetic variations in a track or as analog or binaryelectric signals. Binary or logic signals are capable of assuming onlyone of two values, while an analog signal is defined as a signal thatcan vary continuously between two positive and/or negative limit values.For simplification, any data item contained on a magnetic disc isdesignated in the present specification and claims as a bit. Inparticular, data items for identifying tracks are referred to as "trackreference bits", while data items to be processed are referred to as"processed data bits".

To minimize the time required by the magnetic head to access any item ofdata to be processed, it is necessary for the head to move from onetrack to another in the shortest possible time. It is also necessary forthe head to be positioned precisely with respect to the track. One typeof system having a relatively short accessing time employs a voice coiltype, electro-dynamic motor which is operated in a "bang-bang" mode ofoperation. The voice coil motor includes a coil that is linearlydisplaced within a cylindrically shaped permanent magnet. The coil ismechanically connected by a suspension arm to a carriage for themagnetic head. The magnetic head is driven through an accelerationphase, followed by a deceleration phase, whereby the head is displacedand accurately positioned at a desired track. During the accelerationphase, a constant current of one polarity is applied to the voice coil.The constant current causes the speed of the carriage and of the headsto increase as a linear function of displacement time. Because of thelinear increase in speed of the carriage and head, the position of thecarriage and head, as a function of time, is represented as an ascendingarc of a parabola.

During the deceleration phase, a constant current of the oppositepolarity is applied to the voice coil. The speed of the carriagetherefore decreases as a linear function of time, while the position ofthe carriage and head, as a function of time, is represented as adescending arc of a parabola. Upon the completion of the decelerationphase, the carriage speed and the distance which remains for it totraverse to the desired location on the track should be sufficientlysmall for the head to be stopped above the selected track. A preferredconfiguration for traversing the heads in the described manner isdisclosed in commonly assigned, U.S. Pat. No. 4,166,970.

In the apparatus and method disclosed in U.S. Pat. No. 4,166,970, theaddress of a track is the only data controlling the magnitude of thecurrent supplied to the voice coil which drives the read/write head. Theread/write head is displaced from an initial track A to a desired trackB, the addresses of which are derived by a circuit for controllingaddresses of the disc associated with the particular head. During theacceleration phase, the motor is supplied by a constant current as thehead traverses from track A to track C, between tracks A and B. When thehead arrives at track C, the current is reversed and the decelerationphase occurs.

In the method of U.S. Pat. No. 4,166,970, the track addresses arerecorded on the discs in reflected binary, i.e., Gray, code. The addressof track C is calculated as a function of the addresses of tracks A andB, with all three addresses being expressed in weighted binary orstandard code. As the magnetic head is displaced, it reads trackaddresses which are stored and converted into weighted binary code.During the acceleration phase, the converted addresses are compared withthe calculated address of track C. In response to track address C beingread by the magnetic head, the deceleration phase is entered. Thedeceleration phase subsists until the speed of the head and carriage,i.e., movable system, is less than a minimum threshold V₀, as calculatedfrom the read and converted addresses. In response to the speed of themovable system being less than the minimum threshold V₀, addresses ofthe tracks read by the magnetic head are read and compared with trackaddress B. In response to the read track address being equal to trackaddress B, the movable system is immobilized. A new displacement takesplace if the read address differs from the address of track B.

The prior art system disclosed in U.S. Pat. No. 4,166,970 performs boththe acceleration and deceleration phases in an open loop manner, i.e.,without servo-control. Because of the open loop manner of operation,certain disadvantages occur. In particular, the distance which the headmust travel from the moment when the head speed has dropped below thethreshold V₀ is quite variable, even in situations wherein the samestarting track A and the same final track B are involved. The variabletravel distance is due to various internal and external parameters.Exemplary of the internal parameters are displacement direction,temperature, motor characteristics, such as coil inductance andresistance, and force coefficient, while exemplary of the externalparameters are dry and viscous friction, effects of weight due to therelatively large disc memory inclination, and external vibrations. Ithas been found that the variable distance which must be traveled by thehead after the head speed has dropped below the threshold V₀necessitates several successive operations to reach the desired, finaltrack B. Thereby, the time required by the head to access the data to beprocessed is relatively long. A second disadvantage which has been foundthrough experimentation is that the prior art method does not functionproperly if there is a small separation between the starting track A andthe final track B. In one particular situation, it was found that if theseparation between the starting and final tracks was less than six, themethod would not function properly. A further disadvantage is that is isdifficult of obtain short access times with the prior art method.

It is, accordingly, an object of the present invention to provide a newand improved method of and apparatus for displacing a movable systemwith respect to a data carrier.

Another object of the present invention is to provide a new and improvedapparatus for and method of controlling the movement of a magneticread/write head of a magnetic disc memory system so that the head isvery accurately and quickly driven from a starting track A to a desiredfinal track B.

Another object of the present invention is to provide a new and improvedapparatus for and method of driving a magnetic read/write head betweentrack A and track B of a magnetic disc wherein internal and externalparameters tending to increase the time required to drive the headbetween the tracks are circumvented.

A further object of the present invention is to provide a new andimproved system for and method of driving a magnetic read/write headstarting track A and a desired final track B of a magnetic disc whereinthe same method and apparatus can be utilized for closely spaced andrelatively distant tracks.

The Invention

In accordance with the present invention, the prior art system ismodified to circumvent the above mentioned disadvantages by providing aservo-control system responsive to acceleration of the movable systemincluding the magnetic head. The servo-control system involvescalculating at predetermined sampling instants an accelerationinstruction function γ_(c) of the track address over which the head islocated. The calculated acceleration instruction function γ_(c) isconsidered as the acceleration instruction function γ_(c) for themovable system including the head and carriage. The calculated value ofγ_(c) is compared with a measured value γ for the system acceleration.In response to the aforesaid comparison between the values of γ_(c) andγ, a voltage is derived and applied to the terminals of the voice coilwhich displaces the head and arm.

The servo or feedback system of the present invention provides asignificant reduction in the time required for the read/write head toaccess any data item recorded on the face of a disc, compared to theapparatus and method disclosed in U.S. Pat. No. 4,166,970. A furtheradvantage of the present invention over the prior art is that theread/write head is driven to the final track B in a single movement,without several successive movements, as has been found frequently to bethe case with the prior art.

In a more specific aspect, the present invention involves displacing amovable system with respect to a data carrier on which are recorded aplurality of tracks having addresses written on the carrier in aplurality of reference zones. The number of reference zones is at leastequal to the number of tracks, whereby each track is associated with atleast one zone. The movable system is actuated by an electric motorwhich drives at least one data read head from a starting track A to anarrival or final track B, having an address designated as AD_(f). As thehead is traversed between tracks A and B, the addresses of the tracksare read by the head as addresses ADL_(j).

In the invention, one acceleration instruction γ_(c) is calculated as afunction of address ADL_(j) at predetermined sampling instants. At eachof the predetermined sampling instants, the system acceleration γ ismeasured. The values of γ_(c) and γ are compared for each samplinginstant. In response to the comparison between γ_(c) and γ, the motor iscontrolled.

In a preferred embodiment of the invention, the method and apparatusinvolve calculating the separation ε₁, between the final track addressand the track address where the head is located, as ε₁ =AD_(f) -ADL_(j).From the calculated value of ε₁, a non-linear f(ε₁) is determined. Thespeed of the movable system is calculated as a function of thedifference between the addresses read by the head at adjacent samplinginstants. The acceleration instruction γ_(c) is calculated as directlyproportional to the sum of (f(ε₁)-v).

The above and still further objects, features and advantages of thepresent invention will become apparent upon consideration of thefollowing detailed description of several specific embodiments thereof,especially when taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS:

FIGS. 1a-1e are topological diagrams including schematic illustrationsof the manner in which data are arranged in a preferred embodiment ofthe present invention on a magnetic disc;

FIGS. 2a-2c are schematic diagrams indicating the manner in which dataare recorded in cells in accordance with the invention and of a waveformderived from a head reading a cell;

FIG. 3 is a block diagram of a device for displacing a movable systemwith respect to a magnetic disc data carrier, in accordance with theinvention;

FIG. 4 is a curve of function f(ε₁) as a function of address separationε₁ ;

FIG. 5 is a curve of the manner in which the speed of the movable systemvaries as a function of time;

FIG. 6 is a curve of supply voltage for a voice coil for the movablesystem, as a function of time;

FIG. 7 is a more detailed block diagram of a displacement device inaccordance with a preferred embodiment of the invention;

FIG. 8 is a schematic illustration of the accurate manner in which theaddress ADL_(j) of a track having serial number j is determined; and

FIG. 9 is a diagram of estimated average measured speed, with anestimation delay θ, with respect to actual speed of the movable system.

BEST MODE FOR CARRYING OUT THE INVENTION:

To provide a better understanding of the principles of the presentdevice, relating to an apparatus for and method of displacing a movablesystem with respect to a recording carrier in the form of a magneticdisc, it is useful to review the manner in which data are recorded on amagnetic disc in the prior art. To this end, reference is made to FIGS.1a-1e wherein the layout of the data is illustrated. A preferred mannerof writing data within reference zones of the magnetic disc illustratedin FIGS. 1a-1e is indicated by the illustrations in FIGS. 2a-2c.

In FIG. 1a, a magnetic disc D is assumed to be turning about its center,in the direction of arrow F. Disc D includes a useful recording surfacebetween concentric circles d₁ and d₂, from which data are read by asingle magnetic read/write head TEL, FIG. 1d. On disc D there aredefined n₀ equal and adjacent circular sectors S₀, S₁ . . . S_(i) . . .S_(n).sbsb.0₋₁. Each sector S_(i) is divided into a relatively largeregion SDO_(i) and a relatively small region SAD_(i), on which arerespectively recorded the data to be processed and track addresses. Asillustrated in FIGS. 1c and 1d, address segments SAD_(i) of sectorsS_(i) are divided into N zones ZRP_(i0) . . . ZRP_(ij) . . .ZRP_(i)(N-1), where N is the number of magnetic tracks on disc D. Whileonly five zones ZRP_(i0) -ZRP_(i4) are illustrated in FIGS. 1c and 1dfor simplification, it is to be understood that there are several tensof zones on a particular disc. The boundaries between different zonesZRP_(ij) are circular axes Ax_(j) of adjacent magnetic recording tracks.Zone ZRP_(ij) is associated with magnetic tracks having serial number jon axis Ax_(j). Thus, reference zone ZRP_(i0) is associated with thetrack having serial number 0, while reference zone ZRP_(i1) isassociated with the track having serial number 1, etcetera.

The magnetic read and/or write heads which cooperate with disc D includea magnetic circuit including a magnetic core on which is disposed awinding that extends across an air gap. To read and write the data to beprocessed from a track of serial number j of magnetic axis Ax_(j),magnetic head TEL remains stationary with respect to the track whiledata are read from the track. It is necessary for the air gap to beperfectly centered on magnetic axis Ax_(j), the boundary betweenreference zones ZRP_(ij) and ZRP_(i)(j+1). Thus, when disc D has beenrotated so that head TEL is above a reference zone, the head straddlesreference zones ZRP_(ij) and ZRP_(i)(j+1).

To simplify FIG. 1d, reference zones ZRP_(ij) are represented asrectangles instead of arcuate regions. Each of reference zones ZRP_(ij)contains the address of the track with which it is associated. ZoneZRP_(i0) contains the address of the track having serial number 0, zoneZRP_(i1) contains the address of the track having serial number 1, zoneZRP_(i2) contains the address of the track having serial number 2,etcetera. The track addresses are written in reference zones ZRP_(ij) inreflected binary code, frequently referred to as Gray code. The Graycode is well known and a description thereof appears, for example, in abook written by H. Soubies-Camy, published by Editions Dunod, 1961,pages 253 and 254. The Gray code for two successive addresses, thoseassociated with tracks 124 and 125, are illustrated in FIG. 1e as001000010 and 001000011, respectively. Thus, the Gray code for tracks124 and 125 differ from each other by only one bit, namely the last bit,which is equal to zero for track 124 and equal to one for track 125.

Reference is now made to FIG. 2a wherein there are schematicallyillustrated individual cells forming a reference zone ZRP_(ij) of asector S_(i). It is assumed that the disc containing the cellsillustrated in FIG. 2a is moving from right to left relative to amagnetic head, as indicated by arrow F. As described in copending,commonly assigned, U.S. application, Ser. No. 076,332, filed Sept. 17,1979, (Lowe, King, Price and Becker Docket 037-058), entitled "Method OfWriting Information On A Magnetic Recording Medium", the track addressis contained in part PAD of zone ZRP_(ij). The rest of zone ZRP_(ij)principally contains data for servo-controlling the position of head TELon axis Ax_(j) of the track having serial number j. Reference zoneZRP_(ij) is preceded by zone ZB_(ij), referred to as a "wide zone" whichseparates the reference zone from segment SDO_(i) of sector S_(i),containing data to be processed. In zone ZB_(ij), the magnetic inductionis constant, for example, at a negative value, as indicated in FIG. 2a.In response to relative movement between zone ZB_(ij) and head TEL,while the head is positioned above reference zone ZRP_(ij), the headderives a zero output signal.

To record data on a magnetic disc, a succession of small magneticbarriers, having dimensions on the order of a few microns, referred toas "elementary areas" are created on each disc track. These areas are ofvariable length and are distributed over the entire track length andinclude alternate magnetic inductions of the same value, but of oppositepolarity, in a direction parallel to the disc surface.

The start of reference zone ZRP_(ij) is indicated by line DZ_(ij), thatdefines a change in magnetic induction polarity between negativeinduction zone ZB_(ij) and a positive magnetic induction area DM₁ ofzone ZRP_(ij). In the remainder of the specification and claims of thepresent application, a change in magnetic induction direction is referedto as a "magnetic transition".

A magnetic transition can be of two different types. A first type ofmagnetic transition occurs when the face of the magnetic disc travelsbeneath the magnetic head TEL, whereby the head is exposed to successiveelementary magnetic areas of negative and positive induction; thecorresponding magnetic transition is referred to as positive. A magnetictransition is defined as being negative if head TEL is exposed tosuccessive elementary positive and negative induction areas.

Segment PAD of zone ZRP_(ij), where the address of the zone is located,includes m identical elementary cells, each having an identical lengthL; in the embodiment illustrated in FIG. 2a, twelve such cells areillustrated and denominated as C₀, C₁ . . . C_(k) . . . C₁₁. Each cellof segment PAD contains one address bit. Any address B_(k) contained ina cell is defined by the presence or absence of a double magnetictransition. The first magnetic transition T_(1k) is of an oppositepolarity to the second transition T_(2k). For example, the firsttransition T_(1k) is positive, while the second transition T_(2k) isnegative, as illustrated in FIG. 2b. The address bits ADE_(j) of a trackhaving serial number j of reference zone ZRP_(ij) are coded, forexample, such that bit B_(k) is equal to a binary one, in the case ofthe presence of a double magnetic transition. If bit B_(k) has a valueequal to zero, the double magnetic transition is missing and there is auniform magnetic induction across the length of the cell. Forsimplification, in the following description and claims, the absence andpresence of a double magnetic transition are designated by the term"dibits".

In FIG. 2c are illustrated the analog signals derived by magnetic headTEL in response to cell C_(k) having binary one and zero values. Inresponse to cell C_(k) having a binary one value, as indicated by thedibit on the left side, which includes two transitions, head TEL derivestwo analog pulses of opposite polarities and equal magnitudes, +AMP and-AMP, respectively. In response to the value of cell C_(k) indicating abinary bit value of zero, as indicated by the right portion of FIG. 2b,head TEL derives a zero value, as indicated in the right portion of FIG.2c.

Reference is now made to FIG. 3 of the drawing wherein there isillustrated a block diagram for performing the method of the inventionwherein a movable system SYSMOB to be displaced includes magneticread/write head TEL, mechanically coupled to carriage CHAR. The objectof the apparatus illustrated in FIG. 3 is to displace, in a singlemotion, in the shortest possible time, magnetic read/write head TEL froma starting or initial track A to a final or arrival track B, having anaddress AD_(f). The movement of head TEL is controlled by a non-linearsecond order differential equation of the type:

    f(ε.sub.1)+dε.sub.1 /dt+1d.sup.2 ε.sub.1 /C.sub.2 dt.sup.2 =0                                               (1)

where

ε₁ and f(ε₁) are respectively the non-linear variable and functiondefined supra;

f(ε₁) is assumed to be an increasing function;

by definition, ε₂ =dε₁ /dt=-v, where v is the speed of head TEL; and

ε₃ equals

    ε.sub.3 =d.sup.2 ε.sub.1 /dt.sup.2 =-γ,

where γ is the acceleration of head TEL. By substitution, Equation (1)can be written:

    f(ε.sub.1)+ε.sub.2 +ε.sub.3 /C.sub.2 =0 (1') .

In a preferred embodiment of the invention, movable system SYSMOB isdisplaced with respect to the face of disc D by performing the followingsequence of operations:

(1) at predetermined, equally spaced sampling instants spaced from eachother by T seconds, an acceleration instruction γ_(c) is calculated by:

(a) determing the address ADL_(j) where head TEL is located andcalculating the separation ε₁ ;

(b) determining the corresponding function f(ε₁), a predeterminedfunction of ε₁, whereby f(ε₁) is also a function of address ADL_(j) ;

(c) calculating the speed v of system SYSMOB as a function of thedifference between addresses ADL(nT+k₀ T) and ADL(nT), the addressesADL_(j) read by head TEL at sampling instants t_(n) =nT and t_(k).sbsb.0=nT+k₀ T, where n and k are integers;

(d) calculating the acceleration instruction γ_(c) such that γ_(c) /C₂=(f(ε₁)-v), whereby γ_(c) is a function of ADL_(j) ;

(2) the acceleration γ of system SYSMOB is measured and divided by theconstant C₂ ;

(3) the difference (γ_(c) -γ)/C₂ =Δ(γ/C₂) is calculated;

(4) a coil of electro-dynamic motor ML is driven by a constant voltagehaving a polarity dependent upon the polarity of the calculateddifference Δ(γ/C₂).

The apparatus of FIG. 3 for performing the stated method includeselectro-dynamic motor ML having a voice coil which drives carriage CHARof system SYSMOB. Motor ML is responsive to a network including circuitCIRCAD which determines the address ADL_(j) read by head TEL from discD. The address derived from circuit CIRCAD is combined with an addressoutput signal for the final or desired address of head TEL, as derivedfrom address control circuit GESTAD. The signals from circuits CIRCADand GESTAD are combined in a calculating network ACCEL, which derives,by calculation, the acceleration instruction γ_(c). Calculating networkACCEL is also responsive to an output signal of acceleration measuringdevice MES, which is coupled to motor ML, whereby the measuring devicederives a signal representing the acceleration γ of system SYSMOB. Theoutput signal of measuring device MES is also divided by a predeterminedconstant C₂ in multiplier MUL, having an output signal which is suppliedto one input of comparator COMP, having a second input responsive to theacceleration instruction signal γ_(c) derived from calculating networkACCEL. Comparator COMP compares the acceleration instruction γ.sub. cwith the measured acceleration γ, to derive an error signal which iscoupled to voltage supply generator ALIM for the voice coil ofelectro-dynamic motor ML.

Circuit CIRCAD, illustrated in detail in FIG. 7, responds to an analogsignal ST derived by magnetic read/wirte head TEL when the data dibitscontained in segment PAD of zone ZRP_(ij) are beneath head TEL. SignalST is composed of a set of analog pulses, as indicated in FIG. 2c.Circuit CIRCAD responds to signal ST, to transform it into a set oflogic pulses representative of the address ADG_(j), in Gray code, of theserial number j of the track associated with reference zone ZRP_(ij)which head TEL is over. Circuit CIRCAD converts the Gray code addressADG_(j) into a weighted binary coded address ADL_(j) ; weighted binarycodes are described in the previously cited book by Soubies-Camy.Circuit CIRCAD derives the binary coded weighted address ADL_(j) as amultibit, parallel signal that is supplied to calculation network ACCELon a parallel bus. Address ADL_(j) is supplied by circuit CIRCAD tocalculating network ACCEL with a sampling frequency F=1/T, where T is asampling period equal to the time required for disc D to travel betweentwo segments PAD of two adjacent reference zones ZRP_(ij) andZRP.sub.(i+1)j associated with the same track having serial number j,whereby zone ZRP_(ij) precedes zone ZRP.sub.(i+1)j. In other words,addresses ADL_(j) are supplied by circuit CIRCAD to calculating networkACCEL every T seconds.

Calculating network ACCEL, which calculates the acceleration instructionγ_(c), is illustrated in FIGS. 3 and 7 as including a subtractor SOUS,which responds to the addresses ADL_(j) and AD_(f), respectively derivedfrom circuits CIRCAD and GESTAD. Subtractor SOUS responds to the outputsignals of circuits CIRCAD and GESTAD to derive an output signalproportional to the quantity ε₁ =ADF_(f) -ADL_(j). The output ofsubtractor SOUS is expressed in the same weighted binary code as addressADL_(j) because the final address of track B, as derived from circuitGESTAD, is expressed in the same weighted binary code as addressADL_(j). Subtractor SOUS calculates a new value of ε₁ every T seconds inresponse to the new address ADL_(j) being derived from circuit CIRCADevery T seconds.

The ε₁ output signal of subtractor SOUS is supplied to functiongenerator GF, which derives a binary output signal having a magnitudef(ε₁) every T seconds. Function generator GF derives the non-linearfunction f(ε₁) and supplies it to one input of binary adder ADDIT. Thefunction f(ε₁) is a predetermined, known function, whereby the functiongenerator can be in the form of a look-up table memory which derives thebinary values of f(ε₁) in response to the values of ε₁ derived fromsubtractor SOUS.

FIG. 4 includes a curve representing an exemplary non-linear outputfunction f(ε₁) of function generator GF in response to a set of inputvalues ε₁. From FIG. 4, the slope of the function relating ε₁ to f(ε₁)is relatively large for small values of ε₁, and relatively small forlarge values of ε₁, i.e., the derivative df(ε₁)/dε₁ is relatively largefor small values of ε₁, but the derivative is small for large values ofε₁. It is also noted that the values of f(ε₁) and ε₁ are related to eachother as a monotonic, approximately exponential, function.

Acceleration instruction calculating network ACCEL also includes anetwork CALVIT for deriving a binary signal representing the speed ofhead TEL relative to disc D. Network CALVIT responds every T seconds,i.e., once each sampling instant, to the multibit, parallel addressADL_(j) output of circuit CIRCAD. Network CALVIT determines the speedv_(m) of head TEL relative to disc D, in a radial direction, bycalculating the number of addresses traversed by the head in apredetermined number of sampling intervals from the relationship:ADL(nT+k₀ T)-ADL(nT)=1q, where 1 is an integer and q is a distance equalto a fraction of the width of the tracks on disc D. Because all of thetracks of disc D have approximately the same width lp, as indicated inFIGS. 1d and 8, the value of q=f·lp, where f is a constant between zeroand one and q represents the accuracy with which an address isdetermined. In a preferred embodiment, q=one-half the width of a track,whereby q=0.5 lp. Thereby, in the preferred embodiment, if head TELreads an address ADL_(j) from a track of serial number j, head TEL isdisposed opposite the track of serial number j, at approximately half atrack. The quantity 1q therefore represents the distance traveled byhead TEL during a time interval k₀.T seconds.

Calculating network CALVIT determines the speed of head TEL according tothe formula v_(m) =1q/k₀ T. The calculated or measured speed value v_(m)signal derived by network CALVIT is reversed in polarity and supplied inbinary form to the other input of adder ADDIT.

As described in more detail infra, the measured speed v_(m) derived fromnetwork CALVIT at time instant (nT+k₀ T) is not equal to the actualspeed v of head TEL at the instant (nT+k₀ T). Instead, the output signalof network CALVIT at instant (nT+k₀ T) is indicative of the speed ofhead TEL at a previous time, designated as (nT+k₀ T) -θ, where θ=(k₀+1)T/2; thereby, θ is referred to as an average estimation delay.

Because of the delay in the calculated speed signal derived from networkCALVIT, the acceleration instruction calculation network ACCEL includesa compensation network COMPRET, which compensates for the averageestimation delay θ of measured speed v_(m) with respect to the actualspeed v of head TEL. Network COMPRET responds to signal γ as derivedfrom measuring device MES to derive compensation signal γ_(F) that issupplied to one input of adder ADD, having a second input responsive tothe combined outputs of function generator GF and network CALVIT. Forsimplification, adder ADD and adder ADDIT are shown as a single block inFIG. 3.

Network COMPRET is preferably an analog, low-pass filter networkresponsive to the analog output signal of measuring device MES. NetworkCOMPRET derives an analog output signal γ_(F) such that compensation isprovided for the delay inherent in the operation of binary networkCALVIT. That such compensation occurs can be seen by designating thequantity (V_(m) +γ_(F))=v, the estimated speed of head TEL. Thus, themagnitude of the output signals of networks COMPRET and CALVIT is theestimated speed. The speed difference Δv is defined as v-v=v-v_(m)-γ_(F). The characteristics of low-pass filter network COMPRET areestablished so that the speed difference Δv is a minimum, i.e.,approximately zero. Thus, the estimated speed v is practically equal tothe actual speed v of head TEL. It can be shown that this result isobtained for a value of γ_(F) =γ·G, where G is the transfer function oflow-pass filter COMPRET.

The analog output signal of compensating network COMPRET is reversed inpolarity and supplied, in analog form, to analog adder ADD. Analog adderADD is also responsive to an analog signal representing the amplitudeand polarity of the binary signal derived from binary adder ADDIT. Tothis end, the binary output of adder ADDIT, having a polarity andmagnitude representative of f(ε₁)-v_(m) is supplied to a digital toanalog converter CDA. Adder ADD thus derives an analog signal having amagnitude and polarity in accordance with f(ε₁)-v_(m) -γ_(F). The outputof analog adder ADD is thereby a relatively constant signal representingthe acceleration instruction γ_(c). In effect, the output of adder ADDcan be represented as:

    -v.sub.m +f(ε.sub.1)-γ.sub.F =-(v.sub.m +γ.sub.F)+f(ε.sub.1)=f(ε.sub.1)-v=f(ε.sub.1)+ε.sub.2 =-ε.sub.3 /C.sub.2 =γ.sub.c C.sub.2.

The output signal of adder ADD, having a magnitude represented by γ_(c)/C₂ =-ε₃ /C₂ is supplied to one input of analog comparator COMP, havinga second input, in the form of an analog signal having a magnitude andpolarity represented by ε₃ /C₂, as derived from analog multiplier MUL.

Multiplier MUL responds to an analog output signal of measuring deviceMES, having a magnitude and polarity represented by γ=-ε₃ (t), where tis an instantaneous time value. Acceleration measuring device MESderives an analog signal γ by relying upon the principle that theacceleration of movable system SYSMOB is proportional to the currentsupplied to the voice coil of electro-dynamic motor ML. Thus, theacceleration of system SYSMOB can be determined by measuring the currentsupplied to the voice coil of motor ML and multiplying a signalproportional to the measured current by a proportionality constant toobtain the signal γ. Thus, measuring device MES monitors the currentsupplied to the coil of motor ML and derives a suitable analog signalindicative of the monitored current. For diagrammatic purposes, themeasuring device is shown as being connected to the output of motor ML,but it is to be understood that in actuality it is responsive to thecurrent supplied to the coil of the motor. The analog signal derivedfrom measuring device MES is supplied in parallel to compensationnetwork COMPRET and to multiplier MUL, where it is scaled or multipliedby the factor 1/C₂, and then supplied to comparator COMP.

The output of comparator COMP is an analog signal having a magnitude andpolarity representative of an error between the measured and instructedvalues of acceleration of system SYSMOB. To this end, the magnitude andpolarity of the analog output signal of comparator COMP is representedas (γ_(c) -γ)/C₂ =(ε₃ -ε₃)/C₂ =Δ(ε₃ /C₂). The analog output error signalof comparator COMP is coupled, as a control input, to voltage supplygenerator ALIM. In response to Δ(ε₃ /C₂) being positive and negative,supply generator ALIM respectively supplied voltages +U and -U to thecoil of linear electro-dynamic motor ML. It is to be understood that ina preferred embodiment, adder ADD and comparator COMP are a singleelement, but that they are shown as separate elements for the purposesof clarity. Thus, adder ADD and comparator COMP can, together, beconsidered as a single means for combining signals representative off(ε₁), v_(m), γ_(F), and ε₃ /C₂ to derive the analog error signal Δ(ε₃/C₂).

Reference is now made to FIG. 5 of the drawing wherein the speed ofmovable system SYSMOB is plotted as a function of time while traversingbetween tracks A and B. Between track A and an intermediate track C, thecoil of motor ML is permanently supplied with a positive voltage +U₀ inresponse to the output of generator ALIM, since the error signal Δ(ε₃/C₂) derived by comparator ADCOMP is positive throughout the interval.The positive voltage supplied by generator ALIM to motor ML between timet_(A) and t_(C) is also shown by the waveform of FIG. 6 as having aconstant value +U₀. As illustrated in FIG. 5, between tracks A and Bduring the intervals between times t_(A) and t_(B), head speed v, asrepresented by the curve r₁, is approximately of exponential form, withthe head speed remaining less than speed v_(m). For sufficiently largevalues of ε₁, it is estimated that at each abscissa point, such asabscissa point ε_(1i) (FIG. 4), f(ε₁) has a relatively small value,represented by:

    f(ε.sub.1)=a+αε.sub.1,               (2)

where α=df(ε₁)/dε₁, and α is a very small value. The movement of movablesystem SYSMOB is controlled by a differential equation of the form

    ε.sub.2 +1/C.sub.2 ·dε.sub.2 /dt-constant. (3)

The solution of Equation (3) is of the type

    ε.sub.2 =B.sub.1 (1-e.sup.-C 2.sup.t)              (4)

where B₁ is a constant. Thereby, between tracks A and C, the movement ofsystem SYSMOB is speed regulated.

As head TEL approaches track B, where there are smaller deviations ofaddress ε₁ and the value of the error signal Δ(ε₃ /C₂) is changingpolarity, the approximation given by Equation (2) is no longer valid.Thereby, the movement of system SYSMOB is defined by the nonlinearsecond order differential Equation (1), supra. Because of the changingpolarity of error signal Δ(ε₃ /C₂), the output of ALIM varies between+U₀ and -U₀. Therefore, after track C has been passed, i.e., after timet_(C), the speed versustime curve of system SYSMOB is represented bycurve r₂. The trajectory of curve r₂ corresponds to the non-linearsecond order differential Equation (1) and is approximated as acylindrical helix having an axis extending along approximately astraight line between times t_(C) and t_(B), i.e., in the intervalbetween the intermediate and final track positions.

In FIG. 5 is also shown a curve of the speed v of system SYSMOB as afunction of time for a situation where the starting address A' isremoved by a greater extent from the starting address than for thesituation indicated by curve r₁. Such a situation is indicated by curvesr'₁ and r'₂. Curve r'₁ indicates the speed versus time trajectory ofsystem SYSMOB between pount A' and intermediate point C' for themodified situation, while curve r'₂ represents the trajectory betweentracks C' and B. During the deceleration interval, between time t_(C) 'and time t_(B) for this situation, the voltage supplied by generatorALIM to motor ML constitutes a set of constant amplitude pulses ofalternate polarity in response to the polarity reversals of error signalΔ(ε₃ /C₂). The duration of successive pulses derived from circuit ALIMhas a tendency to decrease over the interval between times t_(C) ' andt_(B) so that the average voltage during this interval has a negativevalue, with a positive slope. The last two pulses in the interval, i.e.,immediately before track B is reached, have the same duration, butopposite amplitude, whereby the voltage supplied by circuit ALIM tomotor ML is zero at time t_(B), as illustrated in FIG. 6. It is to beunderstood that the waveform of FIG. 6 is reversed for a reversal in therelative amplitudes of the initial and final track addresses.

Reference is now made to FIG. 7 of the drawing wherein the details ofcircuit CIRCAD are illustrated as including threshold circuit GSresponsive to the analog output signal of head TEL. Threshold circuit GSderives a serial binary signal that is supplied to converter registerTRANSCOD, also responsive to sampling pulses derived from samplegenerator ECHANT, which pulses are derived every T seconds, whichdefines the sampling times.

Threshold circuit GS responds to output signal ST of head TEL totransform the analog pulses in signal ST into a set of logic pulses. Tothis end, threshold circuit GS includes a pair of thresholds S₁ and S₂which are a function of the absolute value of the average amplitude ofthe signals derived by head TEL for binary one bits in the intervalunder consideration.

It will be recalled, by reference to FIG. 2, that a binary one isrepresented at the output of head TEL by two opposite polarity pulses,while a binary zero is represented at the head output as a zeroamplitude. The thresholds S₁ and S₂ are respectively set to 0.25 AMP and0.75 AMP, where AMP is equal to the average absolute magnitude of theamplitude of each pulse derived for a binary one bit from head TEL.

Circuit GS determines the value of bits derived by head TEL while thehead is in the reference zone by comparing the output signal of the headwith the set threshold values. Because addresses are written in thereference zones in Gray code, a head TEL that perfectly straddles a pairof reference zones derives, for corresponding cells of adjacent trackaddresses, one of three values, namely a zero level, a maximum level,approximately AMP, and an intermediate level, approximately 0.5 AMP. Forany particular pair of adjacent track addresses being read by head TEL,only one cell can be associated with signals of approximately 0.5 AMP;all of the remaining voltages derived from the head, for a particularpair of adjacent reference zones, must be approximately zero orapproximately AMP. The approximately zero and approximately AMP valuesread from head TEL respectively occur for cells having zero and onevalues; thus, in FIG. 1e, voltages of zero or AMP are derived from allof the cells, except for the last cell. For correspondingly numberedcells of adjacent reference zones that differ from each other, theoutput of head TEL is approximately 0.5 AMP. This is the situation ofthe binary one and binary zero values for the last cells of zones ZRP₁₂₄and ZRP₁₂₅, FIG. 1e.

If corresponding bits B_(kj) and B_(k)(j+1) of adjacent reference zonesare both zero, the output signal ST of head TEL is zero, and thereforeless than the threshold S₁. Circuit GS thus derives a binary zero outputsignal. The binary output signal is derived from circuit GS even if headTEL is not positioned so it exactly straddles axis Ax_(j), betweenadjacent reference zones ZRP_(ij) and ZRP_(i)(j+1), so long as the edgesof the head are positioned anywhere between boundaries Ax.sub.(j-1) andAx.sub.(j+1).

If corresponding cells in the addresses of reference zones ZRP_(ij) andZRP.sub.(j+1) both have a binary bit value on one, the output voltage ofhead TEL has a positive amplitude, followed by a negative amplitude. Thepositive and negative amplitudes have absolute values equal to AMP,which is greater than S₂. Circuit GS responds to the positive andnegative amplitude pulses and the magnitude of ST to derive a binary onevalue as long as the edges of head TEL are positioned between axesAx.sub.(j-1) and Ax.sub.(j+1).

If it is assumed that corresponding cells of the address of zonesZRP_(ij) and ZRP.sub.(j+1) are respectively equal to one and zero, asoccurs for one bit of a pair of adjacent reference zones, an ambiguitybit is detected by detector GS. The absolute value of the signal derivedfor an ambiguity bit can vary continuously from zero to one hundredpercent of AMP, depending upon the position of head TEL relative to axisAx_(j), as long as the edges of head TEL are confined between axesAx.sub.(j-1) and Ax.sub.(j+1). In the extreme left position illustratedin FIG. 8, the center of head TEL is at position POS₁, midway betweenaxes Ax.sub.(j-1) and Ax_(j). In the intermediate position illustratedin FIG. 8, head TEL is located so that the center thereof is at positionPOS₂, on axis Ax_(j). Head TEL may also be at the extreme right positionillustrated in FIG. 8, whereby the center of the head is coincident withposition POS₃, which is halfway between axes Ax_(j) and Ax.sub.(j+1).The distance between positions POS₁ and POS₃ is equal to the width of azone ZRP_(ij), which in turn is equal to the width lp of a track. Thedistance lp is also referred to as the pitch between tracks.

The amplitude of the signal derived from head TEL is dependent upon thelocation of the center of the head relative to positions POS₁ and POS₃.Let x represent the position of the center of head TEL, such that x=0when the center of head TEL is at position POS₁ and x=1 when the centerof head TEL is at position POS₃. The amplitude of the ambiguity bit isthus a function of x and is represented as A(x). Considering thesituation of the two least significant bits in the addresses of FIG. 1e,wherein cell C_(kj) has a value of zero and cell C_(k)(j+1) has a valueof one, it is seen that if x is less than lp/4, A(x) is less than thethreshold S₁, equal to 0.25 AMP. On the other hand, if x is greater than3 lp/4, A(x) is greater than the maximum threshold, equal to 0.75 AMP.If x is between lp/4 and 3 lp/4, A(x) is between the maximum and minimumthresholds S₁ and S₂, i.e., between 0.25 AMP and 0.75 AMP.

For the ambiguity situation, if one pulse for a particular address cellhas an amplitude greater than upper threshold S₂, the other pulse has anamplitude less than S₁. Detector GS responds to a pair of such pulsesfor a single cell, as well as to pulses between the thresholds S₁ andS₂, to derive binary values for the ambiguity bit such that if theamplitude of the two pulses is between the two thresholds, a binaryweighted value a₋₁ (j) value of one is derived. If, however, the valueof one pulse is less than the lower threshold and the value of the otherpulse within a cell is above the upper threshold, the binary weightedvalue a₋₁ (j) is assumed to be zero.

The pulses supplied by detector GS are supplied to converter TRANSCOD,which responds to the Gray coding of the pulses to derive addressADG_(j) or ADG_(j+1). Converter TRANSCOD responds to the output ofthreshold circuit GS at a frequency of 1/T, equal to the frequency ofthe sampling pulses derived by a timing source (not shown) and suppliedto sampling generator ECHANT. Converter TRANSCOD responds to the Graycoded pulses derived from detector GS to derive a weighted or standardbinary coded signal. Converter register TRANSCOD therefore derives everyT seconds, on a parallel output bus, the address ADL_(j) in weightedbinary code and supplies this signal to acceleration coefficientcalculating network ACCEL. The output signal of converter registerTRANSCOD responds to successive binary outputs of detector GS to deriveaddress ADL_(ji), such that

    ADL.sub.j -a.sub.-1 (j)·2.sup.-1 +a.sub.0 (j)2.sup.0 +a.sub.1 (j)2.sup.1 . . . a.sub.n (j)2.sup.n,                      (5)

where

a₁ (j), a₂ (j) . . . a_(n) (j)ε{0, 1}

weight 2⁻¹ -lp/2.

From the foregoing, any position whatsoever of head TEL opposite theface of the disc with which it is associated can be represented by anaddress quantified as a half-step, i.e., half track width. Thus if it isassumed that serial number j equals 124 and x is less than lp/4, i.e.,A(x) is less than S₁, head TEL occupies track 124. If, on the otherhand, x is greater than 3 lp/4, whereby A(x) is greater than S₂, headTEL is located above track 125. If the value of x is between thethresholds S₁ and S₂, it is assumed that head TEL is above track 124.

If it is assumed that the final position of head TEL is such that thehead is positioned directly on magnetic axis Ax_(f) of address AD_(f),

    AD.sub.f =1.2.sup.-1 +a.sub.0 (f)2.sup.0 + . . . a.sub.n (f)2.sup.n(6)

where a₀ (f), a₁ (f) . . . a_(n) (f) belong to {0, 1}.

The separation ε₁ =AD_(f) -ADL_(j), expressed as a half-step, can becalculated in binary form as:

    ε.sub.1 =ε.sub.1-1 (j)·2.sup.-1 +ε.sub.10 (j)·2.sup.0 +ε.sub.11 (j)2.sup.1 . . . ε.sub.1n (j)2.sup.n                                                (7)

where ε_(1i) (j) {0, 1}.

The accuracy with which the position of head TEL can be determined andof the separation ε₁ equals lp/2=q.

Network CALVIT for calculating the speed of head TEL, v_(m), includes,as illustrated in FIG. 7, a circulating memory MEMOCIRC, a binarysubtractor-divider SUBDIV, and an inhibiting device BLOC. Circulatingmemory MEMOCIRC is supplied every T seconds with address ADL(nT+k₀ T)and supplies the address ADL(nT) to subtractor-divider SUBDIV.Subtractor-divider SUBDIV is also responsive to the address ADL(nT+k₀T). Circulating memory MEMOCIRC retains all of the values of addressesread between times (nT) and (nT+k₀ T). Thus, all of the addressesADL(nT), ADL(nT+2T) . . . ADL(nT+k₀ T) are serially stored in memoryMEMOCIRC as they are read. Subtractor-divider SUBDIV calculates thespeed value v_(m) by determining the difference ADL(nT+k₀ T)-ADL(nT) andby dividing the difference by the quantity k₀ T. Subtractor-dividerSUBDIV performs these operations once each sampling interval, i.e.,every T seconds. An output signal is derived from subtractor-dividerSUBDIV at the same frequency that signals are supplied to thesubtractor-divider by memory MEMOCIRC, by inhibiting the output of thesubtractor-divider with output pulses from inhibiting network BLOC thatis activated once every T seconds in synchronism with activation ofmemory MEMOCIRC.

The average estimation delay θ is determined by relying upon the factsthat the time interval separating sampling times (nT) and (nT+k₀ T) is asufficiently small interval (a few milliseconds) such that the variationin the actual speed v of head TEL can be considered as a linearfunction. The corresponding variation in the speed of head TEL as afunction of time is illustrated in FIG. 9, wherein the symbols t₀, t₁,t₂, t₃, t₄, t₅, etcetera, respectively designate the sampling times(nT), (nT+T), (nT+2T), (nT+3T), (nT+4T), (nT+5T), (nT+6T), etcetera; itis assumed that k₀ equals 4. At time t₄, subtractor-divider SUBDIVcalculates the value v_(m1) =(ADL(nT+4T)-ADL(nT))/4T. The calculatedvalue of v_(m1) is blocked for T seconds by inhibiting device BLOC,i.e., between times t₄ and t₅. At time t₅, the value (ADL(nT+5T)-ADL(nT+T))/4T=v_(m2) is calculated. The calculated value ofv_(m2) is blocked for T seconds between times t₅ and t₆. Similarly, attime t₆, the speed v_(m3) is calculated as (ADL(nT+6T)-ADL(nT+2T))/4T.The calculated value of v_(m3) is blocked for T seconds between times t₅and t₆. It is apparent that measured speed v_(m) for times before t₄ andafter t₆ is determined identically to that described for times betweent₄ and t₆. The measured speed derived from network CALVIT is thus aseries of steps, as represented by curve r₅, FIG. 9, with the averagespeed v_(m) being represented by a relatively straight line r₆. Becauseof the linear evolution of actual speed v as a function of time, themeasured speed v_(m) at times t₁, t₂, t₃, t₄, t₅, etcetera, equals theactual speed v measured at the time (nT+k₀ T/2). This fact can beverified by comparing curves r₄ and r₅, FIG. 9. Thereby, the speedmeasured at time t₄ is equal to the actual speed at time t₂, such thatt₂ =(t₄ +t₀)/2=t₀ +(t₄ -t₀)/2-t₀ +k₀ T/2=t₀ +2T. This correlationbetween measured and actual speed results from the fact that when speedevolves linearly as a function of time, the average speed between twotimes equals the measured speed at the middle of the time intervalseparating a pair of sampling times. Because the value of average speedv_(m) is blocked for T seconds. It is clearly seen, particularly fromFIG. 9, that the average estimated delay θ=k₀ T/2+T/2=(k₀ +1)T/2.

The optimum value of k₀ is determined from the known relationship thatv_(m) =1q/k₀ T and that the accuracy with which the quantity 1q isdetermined is equal to the value of q. Thereby, a quantification errorε_(q) exists in determining the measured speed v_(m), whichquantification error is equal to q/k₀ T. To the quantification errorε_(q) is added an error ε.sub.θ due to the average estimation delayθ=(k₀ +1)T/2. The result is that the absolute value of ε.sub.θ is equalto the absolute value of γ·θ, whereby, in effect, γ=dv/dt, i.e., dv=dt.If a function Q, known as a "cost function", is defined such thatQ=ε_(q) +ε.sub.θ, there exists a value k₀ =1/T√2q//γ/, to minimize thecost function. It is found that k₀ =4 in the described embodiment.

While there have been described and illustrated several specificembodiments of the invention, it will be clear that variations in thedetails of the embodiments specifically illustrated and described may bemade without departing from the true spirit and scope of the inventionas defined in the appended claims.

I claim:
 1. A method for displacing a movable system with respect to adata carrier on which are recorded a plurality of tracks havingaddresses written within a plurality of reference zones, the number ofreference zones being at least equal to the number of tracks, each trackbeing associated with at least one zone, the movable system being drivenby a motor and comprising at least one data read head which is displacedfrom a starting track to an address arrival track ADL_(f), addressesread by the head during displacement thereof by the motor beingdesignated by ADL_(j), said method comprising calculating anacceleration instruction γ_(c) in response to read addresses ADL_(j) atpredetermined sampling instants, measuring the acceleration γ of thesystem, comparing the accelerations γ_(c) and γ, and controlling themotor as a function of the comparison between γ_(c) and γ.
 2. The methodof claim 1 further comprising reading the addresses at spaced samplingtimes, at each of the sampling times: calculating the separation ε₁between the arrival track and the address read by the head, determininga non-linear function f(ε₁) in response to the calculated separation ε₁,calculating the speed v of the system as a function of the difference ofthe addresses read by the head at differing sampling times, andcalculating the acceleration instruction γ_(c) proportionately to thesum (f(ε₁)-v).
 3. A method of shifting a head which is movable relativeto a carrier for recorded information carried by a plurality ofrecording tracks, the addresses of the tracks being recorded on thecarrier in a plurality of reference zones, at least equal in number tothe number of tracks, each track being associated with at least onezone, the head being moved by a motor and reading the addresses, thehead being shifted from a starting track A to a destination track B,comprising the steps of accelerating the head from track A to anintermediate track C by supplying the motor with a constant voltage,after the head has reached track C reversing the polarity of theconstant voltage as a function of the actual acceleration magnitude ofthe head and addresses read by the head so the head is decelerated andstops at track B.
 4. The method of claim 3 wherein the read addressesand the address of the destination track are combined to derive anacceleration instruction, and controlling the polarity of the constantvoltage in response to the relative values of the accelerationinstruction and the actual acceleration.
 5. The method of claim 1 or 2or 4 wherein the voltage supplied to the motor is controlled bycalculating the difference between the read address and the address ofthe destination track, calculating the speed of the head in response tothe time required by the head to read addresses separated from eachother by a predetermined amount, and calculating the accelerationinstruction as a function of the separation and the head speed. 6.Apparatus for displacing a movable system with respect to a data carrieron which are recorded a plurality of tracks having addresses writtenwithin a plurality of reference zones, the number of reference zonesbeing at least equal to the number of tracks, each track beingassociated with at least one zone, the movable system being driven by amotor, and including at least one data read head which is displaced froma starting track to an address arrival track, said apparatus comprisingmeans responsive to the read addresses derived from the head forderiving a signal indicative of an acceleration instruction γ_(c), meanscoupled to the system for measuring the acceleration γ of the system andfor deriving a signal indicative of γ, means responsive to the signalsindicative of γ_(c) and γ for comparing γ_(c) and γ and deriving anerror signal, and means responsive to the error signal for controllingthe motor.
 7. The apparatus of claim 6 wherein the means for calculatingincludes means for calculating the separation ε₁ between the arrivaltrack address and the address read by the head and for deriving a signalindicative of the calculated separation, a non-linear function generatorfor deriving a signal indicative of f(ε₁) in response to the calculatedseparation signal ε₁, means for calculating the speed v of the systemand deriving a signal indicative of v in response to the read addressesas a function of the difference of the addresses read by the head atdiffering times, and means for calculating the acceleration instructionγ_(c) proportionately to the sum (f(ε₁)-v) in response to the signalsindicative of f(ε₁) and v.
 8. Apparatus for shifting a head which ismovable relative to a carrier for recorded information carried by aplurality of recording tracks, the addresses of the tracks beingrecorded on the carrier in a plurality of reference zones at least equalin number to the number of tracks, each track being associated with atleast one zone, the head reading the addresses, the head being shiftedfrom a starting track A to a destination track B, comprising means foraccelerating the head from track A to an intermediate track C and fordecelerating the head when it reaches track C so the head stops at trackB, said means for accelerating and decelerating including means forcalculating an acceleration instruction in response to addresses read bythe head and for deriving a signal indicative of the accelerationinstruction, means for measuring the head acceleration and for derivinga signal indicative of measured head acceleration, means responsive tothe acceleration instruction and the measured head accleration signalsfor deriving an error signal, and means for controlling the speed of thehead as a function of the error signal.
 9. The apparatus of claim 8wherein said control means includes a motor for driving the head andmeans for supplying the motor with a constant voltage having a polaritycontrolled by the relative amplitude of the acceleration instruction andthe measured head acceleration.
 10. In combination, a head which ismovable relative to a disc for recorded information carried by pluralconcentric recording tracks on the disc, addresses of the tracks beingrecorded on the disc in a plurality of reference zones at least equal innumber to the number of tracks, each track being associated with atleast one zone, the head reading the recorded information and addresses,the head being shifted from a starting track A to a destination track B,an electric motor for driving said head, means for controlling the motorso the head is accelerated from track A to track C while the head istraveling from track A to track C and the head is decelerated when thehead reaches track C, track C being between tracks A and B, said meansfor controlling including means for calculating an accelerationinstruction signal for the head in response to addresses read by thehead, means for measuring the acceleration of the head and for derivinga signal indicative of the measured acceleration, means responsive tothe instruction and measured acceleration signals for deriving an errorsignal, and means responsive to the error signal for controlling thevoltage supplied to the motor.
 11. Apparatus for shifting a head whichis movable relative to a carrier for recorded information carried by aplurality of recording tracks, the addresses of the tracks beingrecorded on the carrier in a plurality of reference zones at least equalin number to the number of tracks, each track being associated with atleast one zone, the head being moved by a motor and reading theaddresses, the head being shifted from a starting track A to adestination track B, comprising means for accelerating the head fromtrack A to an intermediate track C and for decelerating the head when itreaches track C so the head stops at track B, said means foraccelerating and decelerating including means for applying a constantamplitude voltage of one polarity to the motor while the head is beingaccelerated and for applying opposite polarity voltage pulses ofdiffering polarity to the motor while the head is being decelerated,said voltage pulses having said amplitude and progressively narrowerwidths, except that the last two pulses have the same width.
 12. Theapparatus of claim 11 wherein the means for applying the voltages andvoltage pulses includes means for calculating an accelerationinstruction in response to addresses read by the head and for deriving asignal indicative of the acceleration instruction, means for measuringthe head acceleration and for deriving a signal indicative of measuredhead acceleration, means responsive to the acceleration instruction andthe measured head acceleration signals for deriving an error signal, andmeans for controlling the polarity of the voltage applied to the motoras a function of the error signal polarity.
 13. In combination, a headwhich is movable relative to a disc for recorded information carried byplural concentric recording tracks on the disc, addresses of the tracksbeing recorded on the disc in a plurality of reference zones at leastequal in number to the number of tracks, each track being associatedwith at least one zone, the head reading the recorded information andaddresses, the head being shifted from a starting track A to adestination track B, an electric motor for driving said head, means forcontrolling the motor so the head is accelerated from track A to track Cwhile the head is traveling from track A to track C and the head isdecelerated when the head reaches track C, track C being between tracksA and B, said means for controlling including means for applying aconstant amplitude voltage of one polarity to the motor while the headis being accelerated and for applying opposite polarity voltage pulsesof differing polarity to the motor while the head is being decelerated,said voltage pulses having said amplitude and progressively narrowerwidths, except that the last two pulses have the same width.
 14. Theapparatus of claim 13 wherein the means for applying the voltage andvoltage pulses includes means for calculating an accelerationinstruction signal for the head in response to addresses read by thehead, means for measuring the acceleration of the head and for derivinga signal indicative of the measured acceleration signals for deriving anerror signal, and means responsive to the error signal polarity forcontrolling the voltage polarity applied to the motor.
 15. The apparatusof claim 6 wherein the means for calculating the signal indicative ofacceleration instruction comprises means responsive to binary codedsignals indicative of addresses read by the head from the carrier andfrom a source for the address of the arrival track for calculating theaddress separation between the read and final track addresses and forderiving a signal indicative of the separation, means responsive to thesignal indicative of the separation for generating a signal that isindicative of a non-linear function of the address separation, meansresponsive to the read addresses for calculating the head speed as afunction of addresses read by the head and the time taken for the headto traverse between the addresses and for deriving a signal indicativeof head speed, and means for combining the signals indicative of thenon-linear function of the address separation and the head speed forderiving a control signal for the motor.
 16. The apparatus of claim 15further including means responsive to a parameter of the motor forderiving a signal indicative of the actual head acceleration, the signalindicative of acceleration instruction being delayed in time relative tothe signal of actual head acceleration, means for delaying the actualhead acceleration signal by a time interval commensurate with the delayof the acceleration instruction signal, and means responsive to thedelayed actual acceleration signal and the acceleration instructionsignal for controlling the motor.
 17. The apparatus of claim 16 whereinthe means for deriving the signal indicative of actual head accelerationincludes means responsive to the current supplied to the motor forderiving an analog signal having a magnitude proportional to the currentsupplied to the motor for the head, the signal indicative of theacceleration instruction being a digital signal derived in response tothe output of the function generator and the speed calculating means,means for converting the digital signal to an analog signal, and meansfor combining the converted analog signal with the analog signal derivedin response to the current supplied to the motor.
 18. The apparatus ofclaim 6 wherein the means for determining the acceleration instructionincludes means responsive to addresses read from the carrier by the headand the arrival track address and responsive to the signal indicative ofmeasured head acceleration, means for combining the signals indicativeof the addresses read by the head and the arrival track addresses toform an acceleration indicating signal that is delayed relative to themeasured acceleration signal, means for delaying the measuredacceleration signal, means for combining the delayed measuredacceleration signal with the acceleration indicating signal derived fromthe read and destination addresses to derive the accelerationinstruction signal, and means for combining the acceleration instructionsignal with the measured acceleration signal to derive a control signalfor movement of the head.
 19. The apparatus of claim 7 wherein the meansfor calculating head speed includes a recirculating memory responsive toaddresses read by the head, said recirculating memory storing alladdress values read at predetermined sampling times during apredetermined sampling interval, a subtractor-divider circuit responsiveto the addresses read from the recirculating memory during an intervalcommensurate with the interval while the recirculating memory isresponsive to the addresses read by the head for deriving calculatedvalues of head speed, and an inhibiting circuit for blocking thecalculated values of head speed during an interval equal to the intervalbetween a pair of adjacent sampling times.
 20. The apparatus of claim 19wherein the circuit responsive to addresses read by the head from trackson the carrier includes a threshold circuit for transforming a series ofanalog pulses derived by the head into a series of binary pulsesrepresenting the read address in a first code, a converter register fortransforming the address in the first code into an address in the secondcode, and a sampling generator for supplying sampling pulses to theconverter register so that the converter register derives the convertedaddress signal at the same times as the means for determiningacceleration instructions.
 21. Apparatus for controlling the movement ofa head reading addresses from plural reference zones written on a datacarrier, the number of reference zones being equal in number to thenumber of data tracks on the carrier, addresses of the tracks beingwritten in the reference zone whereby each track is associated with atleast one zone, said apparatus including a motor for driving the head, acircuit for deriving destination addresses for the head, meansresponsive to the actual acceleration of the head for deriving an actualacceleration signal, and means for combining the actual accelerationsignal with signals indicative of the read and destination addresses forderiving a control signal for the motor to enable the motor to drive thehead to the destination address.
 22. The apparatus of claim 21 whereinthe means for deriving the signal indicative of actual acceleration ofthe head includes means for monitoring the current supplied to themotor.
 23. A method of shifting a head relative to a magnetic disc forrecorded information carried by plural concentric recording tracks onthe disc, addresses of the tracks being recorded on the disc in aplurality of reference zones at least equal in number to the number oftracks, each track being associated with at least one zone, the headreading the recorded information and addresses, the head being shiftedfrom a starting track A to a destination track B, an electric motor fordriving said head, said method comprising controlling the motor so thehead is accelerated from track A to track C while the head is travelingfrom track A to track C and the head is decelerated when the headreaches track C, track C being between tracks A and B, calculating anacceleration instruction for the head in response to addresses read bythe head, measuring the acceleration of the head, responding to theinstruction and measured accelerations for deriving an indication of anerror between them, and controlling the motor in response to the errorindication.